Design Of High-resolution Discrete Time Σ-Δ Modulator

Due to the widely use of mobile phone, tablet PC and other portable handheld device, and the development of the third generation wireless communication technology, SigmaDelta ADC has become one of the most popular field in the normal ADC fields. SigmaDelta ADC has a very diverse application scenarios, such as High-resolution lowbandwidth data conversion, ultra-low power biomedical systems and medium-resolution broadband wireless communications. This versatility, together with their robustness and their simplicity in many practical situations, make Sigma-Delta ADC as engineer’s best choice in their research projects and their industrial products.Sigma-Delta ADC mainly based on two principles of signal process,oversampling technology and noise shaping technology. Oversampling technology can ease the design of anti-aliasing filter. Noise shaping technology can effectively reduce the in band noise. Because of the oversampling technology and the noise shaping technology, Sigma-Delta ADC can achieve high conversion accuracy without the use of high resolution quantizers. Meanwhile, due to the use of digital signal process in the digital parts, analog parts became easy to design and insensitive to mismatch. And the digital parts suit the modern CMOS technology very well. Another advantage of the modulator is that, it doesn’t need a special sample-hold circuit. The Sigma-Delta modulator is the most important parts of the sigma –delta ADC, the performance of the modulator determines the performance of the whole system.This paper mainly design a high-resolution Sigma-Delta modulator which can be used in audio field with 55 nm CMOS technology. Based on the basic theory of modulator and the performance we need to achieve, a 2-1 cascade structure modulator is designed. Through the research of non-ideal character of modulator,such as finite amplifier gain,integrator settling error,circuit noise in modulator,and system-level simulation under Simulink circumstance,we establishes the optimal system architecture.As soon as the system architecture is established,we begin to the design of unit circuit of modulator,for example,the integrator,the current reference circuit and the comparator. Because of non-idealities in the modulator, a new type Chopper-Stabilization and dynamic element matching technology( DEM) is employed. The ChopperStabilization technology is used to reduce flick noise and offset of the first stage of the integrator, and the Dynamic Element Matching technology is employed to eliminate the nonlinearity due to the mismatch of the capacitors in the feedback DAC. And the simulation result shows that the SNR of the system reaches 103.4d B, the ENOB 16.88 bits, and the power dissipation is 6.45 mW.