Design Of 2-2 Mash Sigma-Delta Modulator

As the rapid development of SOC chip recent years, the analog to digital converter with high performance and low power become more and more popular. Based on the backgrounds, the goal of the paper is to achieve high precision, low power consumption, wide input swing analog to digital converter. Sigma-Delta modulator is an effective method to implement high resolution ADC in very large scale integrated circuit technology. Combined with the oversampling and noise shaping technology, Sigma-Delta modulator is possible to achieve resolution as high as 16 bit plus. This structure is relatively insensitive to the non-ideal characteristics of the analog circuit, providing numerous advantages for realization in high-density and low-cost modern VLSI technologies. But Sigma-Delta ADC is difficult to achieve high speed, and it increases the difficulty to implement the decimation filter. This paper is devoted to the research and realization of Sigma-Delta modulator with high-performance,low-power and wide input swing.In order to guarantee the stability of the system, we adopt the 2-2MASH Sigma-Delta modulator structure. In order to reduce the 1/f noise and distortion noise, the first stage of the modulator uses chopper stabilization technology. Through the MATLAB modeling and system simulation, the feed-forward factors, feedback factors and the gain of integrators can be established. The new coefficient can make the input swing of the modulator achieve almost full swing.As to meet the portability of the application, the design of the modulator use low power consumption method, so that the whole system has the lowest power consumption. Through the design of modulator, from system modeling, circuit design, layout design to tape-out, we form complete flow. The design is implemented in MXIC 0.5μm L50 w CMOS process and the modulator is designed with fully differential switched capacitor structure. The power supply is 5V. When the signal bandwidth is 7.8KHz and the sampling frequency is 1MHz, the modulator input swing is ±4V. Besides, the highest SNR is 111.3d B, which represents 18 bits effective resolution. The whole power consumption is about 6.6m W. The modulator can be used in Sigma-Delta ADC which requires high precision, low power consumption, wide input swing.