The Design Of Hgih-speed I/O For 10G-SerDes

As the CMOS technology continues to follow the Moore’s law, the feature size has scaled down to 14 nm.This contributes to the sharply improvement of the processing speed of CPUs of personal computer and portable device. Besides,with optical network being adopted widespreadly,data transimission on the backplane endures incresingly pressure.So, conventional parallel data transmission has been inplaced by serial data transmission,and high-speed Ser Des becomes prevalent as interfaces between computer and peripherals or network interface.For considerations of costs and compatibility,FR-4 backplane is still in widely in use. However, data transmitted in FR-4 backplane suffers great attenuation, especially when the signal’s Nyquist frequency is significantly higher than the bandwidth of the channel. For this reason, channel compensation should be introduced in the design of high-speed interface circuit.Aimed at the 10G-Ser Des chips in backplane application, the research focus on the design of a 10Gb/s transceiver based on the SMIC standard 0.13μm CMOS technology. The main work of this research is listed as below:(1) Understanding of the interaction between the signal and the channel, the influence of the channel’s bandwidth-limited characteristic on the signal quality and it’s expression in both frequency domain and time domain. Combined with the channel’s characteristic, this provides fundamental design parameters that determine the choice of circuit topology and channel model.(2) Study of bandwidth improving techniques and equalizing technique. This provides a theoretical foundation for the implementation of high-speed transceiver in the specified technology.(3) Based on SMIC 0.13μm CMOS technology, feed forward source follower and feedback source follower were introduced in the amplify stages, inductive peaking technique and impedance matching are employed in the CML driver. At the receiver, inductive peaking technique and capacitive degeneration technique are adopted in the continuing time linear equalizer, and spectrum division technique and self-comparison method are employed in the feedback loop to achieve adaptive control.Simulation result show that an overall bandwidth of 7GHz, a small signal gain of 18 d B, a differential swing of 800 m V at the transmitter and an adaptive equalization with a compensation range from 0d B to 22 d B at the receiver. In the most adverse case, the receiver maintains a bandwidth of 6.7GHz,and the channel mismatching is less than 2.3d B,the eye opening of the signal approaches 0.85 UI from a completely closed eye at the receiver input end.