Design And Implement Of High-Speed Data Transmission System Based On PCIe Bus

As a new generation of bus interface standard, PCIe bus (PCI Express) has been widely applied to the interconnection between the computer and various peripheral components. Compared to the previous generation of PCI bus in parallel, the rate of data transmission between various equipment is enhanced by over an order of magnitude. It has a higher bus bandwidth and better expansibility for high-speed transmission in today’s large amount of data, especially in high resolution and high frame rate of video image transmission.This article designed and implemented a kind of high speed data real-time transmission system based on PCIe bus according to the PCIe standard specification. The system consists of the PCIe module, bus arbitration module, DDR controller and ARM subsystem. The DMA controller has been added in the PCIe module based on three layers(transaction layer, data link layer and physical layer) of structure, and it can be independent of the processor for bulk data transmission, which is one of the key factors of the system of high-speed transmission. The DMA controller has two channels, one for reading and one for writing, which can be used for multi-data block processing independently. Connecting with the transactions in the controller layer, we can send or receive data through the data link layer and physical layer. According to the PCIe and the ARM subsystem of DDR access requirements, the bus arbitration module ensure that all parts can efficiently access to the DDR. ARM subsystem includes the ARM processor, display controller, SRAM, SD card controller and low-speed external equipment. The data transmission of the real-time system based on PCIe controller and the typical test for software and hardware, indicating that the transmission system has higher transmission efficiency and flexibility. In this article, we present the overall plan of the bus arbitration module hardware designing and the DMA controller of PCIe module in detail. For the system, we have developed the PCIe bus driver based on the HAPS72, and we build the verification platform as well. Through the typical application of video streaming real-time display, we can verify the efficient transmission of the system. The test results show that the transmission system can transmit the real-time video streaming efficiently and stably. The rate of DMA writing can be up to 1494.23 MB/s, and reading can be up to 1406.08 MB/s. The highest bus utilization rate of writing and reading are 93.39% and 87.88% respectively, which has attained the anticipatory aim.The ARM subsystem in this system, can be used as a endpoint device to transmit data to the computers for processing. We can also modify the settings as the root device to receive and process data from other PCIe endpoint devices. After the migration of the embedded operating system, with the appropriate PCIe driver and application program, we can achieve various functions flexibly. Scalability and practicality, the system is also a good reference for designing of high speed transmission system.