The Verification And Testing On Bus Interface Of A High Performance PCI Bridge

With the growing scale of integrated circuit design and the continuously improvement of the design complexity, the functions of products which have been designed are becoming diversity. Rich functional IC products are extremely convenient for users. But for IC designers and manufacturers, it will be a huge challenge. Only for verification, more complex the function is, more difficult to make the operation. Currently, verification and testing are the most time-consuming and most complex part in the whole chip design process, which are accounting for 50 % to 70 % of the development part. It is the key to success in the project. How to verify and test complex chip, and guarantee the correctness and reliability of chip designing effectively has become a problem in IC development.To solve the problem, we should not only make a breakthrough in technology, but also depend on using the resources in the field of the entire functional verification efficiently, and study verification methodology in depth to find a right, appropriate and efficient method. This issue focused on learning verification methodology which based on functional information, also discussed a number of verification techniques, and compared the advantages and disadvantages of the techniques, and selected a suitable verification method on this chip.For functional verification of complex chip design, choosing a right approach and suitable technique, building a strong testbench, and enhancing the degree of verification automation can improve the efficiency of verification and reduce the verification time. It is of great importance to choose the method, and specific basis is the internal architecture and functional behavior of the chip under test. Because of the internal structure of the chip is complex and the function points are abundant, we choose the method based on simulation so that we can observe the result visually.The research object of this issue is based on the specific project about verification I participate. The design under test is a PCI-PCI bridge chip(because of confidentiality, the text is inconvenient to appear specific project name, the following using "a PCI bridge chip" instead) which the maximum transfer rate can be up to 528MB/s and all interfaces can work from 25 Mhz to 66 Mhz. The function of the chip is connecting two PCI buses and completing the data transfer between them, extending the PCI bus and mounting more devices. My research contents are the functional verification and test from primary interface to the secondary interface on chip, and analyzing the results. The specific work of this issue can be summarized as follows:1.Several common verification methods were compared and analysed. According to the actual situation of the chip, considering the related allocation of resources, The functional simulation-based verification method was chosen to complete the verification work.2.A detailed verification plan was developed. From the beginning of building the testbench, test cases and basic tasks were written, and the professional tool NC_verilog were using for simulation. To ensure the accuracy and comprehensiveness of functional verification, in testcases, a full consideration was on each verification part and no point was missing.3.The simulation result was analysed. It shows that verification basically covered all the function points and was consistent with the design requirements. Thus, the verification method this issue chose is feasible, and it has certain value for other chips’ verification of similar types.4.After the chip fabricated successfully, the function and performance of the chip has been tested on a machine. The results are generally good. The function is correct, and the major DC parameters are within the normal range. The chip makes a good performance. This can provide a quality guarantee for large-scale production of the chip in the future.