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Based On The Ahb Interface, Usb 2.0 Otg Ip Core Verification

Posted on:2011-12-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y N WangFull Text:PDF
GTID:2208360308966776Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
The development of the integrate circuit manufacture technology makes the integrate circuit design enter the SOC (system on chip) phase. The IP is the most important unit of the SOC design. The USB2.0 OTG IP based on the AHB realizes the OTG function. As the increasement of the scale in IP design, the verification of the IP design is getting more and more complex. Verification is important to the success of the IP design. How to choose the appropriate verification methods for the different IP products to obtain the great efficiency is a valuable research topic.This dissertation studies the USB2.0 OTG IP verification. Verification plan is important to the success of the project. The function verification points are made according to the design specification. Verification testbench contains three parts, DUT, test environment and test cases. The DUT (design under test) is the USB2.0 OTG IP core which realizes the USB host, USB device and OTG function. The test environment applies the verification IP (VIP) which has high accuracy and convenience to verify the DUT. The AHB environment used to configure the IP register and so on, the ULPI environment simulate USB OTG funcation. Test cases include a set of functional test cases and some corner test cases which can verify the design completely. There is a structure of files diagram which indicates the route of every verification file.In verification, we choose transaction-based verification method to verify the USB2.0 OTG IP completely, and the test environment introduced in this dissertation has good reuse value. At last, in the FPGA test environment, the IP functions achieve our expected requirement. The test environment can also be used in other verification to verify the IP design based on AHB or ULPI. It has good reusability.
Keywords/Search Tags:Universal Serial Bus, Advance High Performance Bus, UTMI+ Low Pin Interface, Verification IP, Verification testcase
PDF Full Text Request
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