Functional Verification Of The Memory Interface In High-performance HostBridge

With the rapid development of modern computer systems, requirements of dataexchange rate between CPU and memory become higher and higher, speed differencebetween CPU and memory has become a bottleneck restricting the overall systemperformance. Using the integrated memory interface in Host Bridge to provide dataexchange channel for CPU and memory, is the current mainstream approach to solvethis problem.The object of this paper is the memory interface in an X high performancehostbridge chip. Beginning with based Verification methodology learning，this paperIntroduces the basic structure of X-Host Bridge, researches the contents of the memoryinterface. Based on the fully understanding the associated timing and design of thememory Interface, the paper builds a verification platform, extracts comprehensivefunctional test points, finishes the work of functional verification for ROM interface,asynchronous DRAM interface, SDARM interface and Error-checking mechanism, andalso analysis’s the verification results. Verification results show that the functionalverification method of the memory interface is feasible and has a certain reference valuefor high-performance memory interface design and verification work.