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Design Of 13.56HMz Passive-RFID Analog Front-end

Posted on:2015-08-19Degree:MasterType:Thesis
Country:ChinaCandidate:F LiFull Text:PDF
GTID:2308330464968730Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Radio frequency identification(RFID) is a technology making use of electromagnetic or electrostatic coupling in the RF portion of the electromagnetic spectrum to uniquely identify an object. It has the advantage of faster reading speed, longer operation range, able to identify high speed motion objects, and so on. For this reason, it has many applications in wild range fields.This paper aims at design and realization of some key circuits in RF/Analog front end of 13.56 MHz RFID tags based on ISO 14443. At the request of low cost and low power consumption.For the request of high efficiency in AC/DC rectify circuit, a new kind of rectify circuit was giving. Using the threshold voltage compensate technology, the loss of MOSFET threshold voltage is canceled. It has great advantage in raising the efficiency of the power transform and voltage transform. When the level of RF input AC signal is 3V, the level of DC output signal is 2.46 V, the power transform efficiency is 83.6%.For the request of the needed of a continuous and stable frequency clock signal in RFID system, a kind of clock circuit based on PLL and enable circuit is given. It can provide stable frequency clock signal with low power consumption. When the frequency of the input signal is 13.56 MHz, the output is a continuous 13.56 MHz clock signal no matter how the input data changes. The frequency deviation is less than 100 k Hz.Some other key circuits in RF/Analog front end were also discussed in this paper. Firstly, a structure named FVF is introduced. Based on this structure, a kind of LDO is designed. Secondly, a sub-threshold reference is given. And then, a reset circuit is designed. Finally the feasibility of using enable circuit in clock circuit to resume the data signal is discussed. Compared with traditional envelope detection circuit, this design can decrease the power consumption and chip area.Circuits discussed before is design and realization based on SMIC 0.13μm standard cell library. From the emulation result can be see that all of these circuits work well and meet the request of expect.
Keywords/Search Tags:RFID, ISO14443, low power, RF/Analog front end
PDF Full Text Request
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