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Design Of RF/Analog Front End Of Ultra Low Power Passive UHF Radio Frequency Identification Chip

Posted on:2014-04-21Degree:MasterType:Thesis
Country:ChinaCandidate:R D LiFull Text:PDF
GTID:2268330401452970Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Passive UHF radio frequency identification (UHF RFID) is a technology making useof electromagnetic or electrostatic coupling in the RF portion of the electromagneticspectrum to uniquely identify an object. It has the advantage of faster reading speed,longer operation range, able to identify high speed motion objects, and so on.This paperaims at design and realization of some key circuits in RF/Analog front end based on theanalysis of the basic principle and structure of UHF RFID, at the request of lowvoltage,low power consumption and low cost.At last, the considerations of layout andthe test results of the chip are given.Firstly,the principle and architectures of UHF RFID is discussed.Secondly, thefunction and system requirements of every circuit is introduced. At last, the maindifficulties in the circuit design prosess is illustrated.Because the UHF RFID tag chip need low voltage low power consumption references,three different structures are given, respectively low voltage bandgap reference, thesub-threshold reference and low starting voltage reference. Firstly, a low voltagebandgap reference is designed based on the traditional bandgap principle. Secondly,a10ppm/℃,670nA,low voltage high PSRR Voltage reference is introduced. At last, astarting voltage less than0.5V low voltage reference circuit is designed making use ofthe current drive substrate technical.Three different structures are given for the UHF RFID tag chip need low powerconsumption LDO circuits, respectively low power LDO circuit,transient-enhancedLDO and load regulation improved LDO. Firstly, we analysis the typical LDO loopstability, then discuss the influence factors and design compromise to the loop stability.Secondly, this paper introduces the active resistance technology which is applied to thelow power consumption LDO design. At last, the design of phase lead network istablked about,providing a frequency compensation method to LDO.Based on these,three different structures are designed.Study of other key circuits of UHF RFID tag chip.Firstly,a high efficiency rectifiercircuit which is compatible with CMOS prosses is designed,based on the analysis ofthe threshold value compensation technology.Then, the demodulation circuit is designedmaking use of active detection circuit, peak detection circuit, hysteresiscomparator.Finally, a kind of low power consumption ring oscillator circuit is given.In the end, matching technology and layout design considerations of mixed signal circuit are discussed and the test results of the tag chip are given.
Keywords/Search Tags:UHF RFID, low voltage, low power, RF/Analog front end
PDF Full Text Request
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