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Design And Implement Of Analog Front-end Circuit For RFID Tag IC

Posted on:2007-08-17Degree:MasterType:Thesis
Country:ChinaCandidate:Q P YangFull Text:PDF
GTID:2178360242961784Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
RFID is a technology of contactless automatic identification, which has a brilliant application future in the field of logistic management. This paper describes passive contactless tag chip complying with the standard of ISO 15693. The chip is aim for the low price tag chip market, such as transportation, storage, package, gate-prohibition, finance, books mangement, files management. This chip is composed of analog front end, digital controller, array of EEPROM storage cell. Analog front end is in charge of obtaining energy, providing all the power supply, generating reset signal, producing clock signal, demodulating the ASK signal and transmitting modulated signal. This paper mainly designs circuit of analog front end in the contact-less tag chip and verify the circuit by the layout. The content as follows: the working principle of RFID, the standard of ISO 15693, the establishing of RFID system model, the design of system scheme and every subcircuit. Such as rectifier and filter circuit, the cicuit of digital supply generating, the circuit of analog supply generating, the circuit for limiting voltage and electronic-static protection, the circuit for generating bias current, the circuit for producing reset signal, the circuit for modulation and demodulation etc. Some circuits such as rectifier and filter circuit, ten percent demodulation circuit, modulation circuit are specially introduced in this thesis. 0.35μm 2P3M embeded EEPROM technology of SMIC is used for designing the analog front end. At last the layout is drawn by use of Virtuoso, and given design rule check, layout Vs schematics check, parasitical parameter extraction. The layout netlist is extracted. The analog front circuit is given post simulation. Then the extracted analog front netlist and eeprom netlist are given mixed post simulation by using Verilog-XL. The extracted analog front netlist and digital netlist are given post mixed post simulation by use of Nanosim. Simulation result shows that the performance of analog front-end circuit meets requirement.
Keywords/Search Tags:RFID, ISO 15693, tag chip, analog front-end, layout verification
PDF Full Text Request
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