Design Of An RF/analog Front End For UHF RFID Tag IC With ISO/IEC 18000-6C Protocol

Radio Frequency Identification (RFID) technology, as a High-tech with great prospects, has been widely used in recent years. The internet of things which is composed with RFID, wireless network and sensor, is even widely concerned in the past several years. The UHF passive RFID tag working in the UHF segment received wide attention in these years for long working distance, strong adaptability , without battery and Low cost.This work presents the design of the analog frond-end (AFE) circuits for a UHF RFID tag in compliance with the ISO/IEC 18000-6C protocol. The low power AFE circuits include a voltage rectifier, a regulator and a novel demodulator. In order to reduce the cost of the chip, NMOS transistors with zero threshold voltage are used in the rectifier instead of the Schottky diode. The work also analyzed the impact of the device parameters on properties of charge pump. In order to avoid the high voltage breakdown the devices, the charge pump is followed by a limiter circuit. The clamping voltage of the limiter is 2.6V.The regulator can generated a stable 2V output voltage, and the settle time is 20?s, the quiescent current is only 1.3?A. The ASK demodulator employs a differentiator circuit, which extends the voltage range of the input RF signal, solving the demodulating problem when the tag works close to a reader.The entire circuits have been processed with SMIC 0.18μm 2P4M CMOS technology. The whole AFE occupies a die area of 720μm*390μm and the total operation current is less than 3?A. The test results show that the regulator can provide a stable output voltage of 2.15V and the demodulator circuit can work well. The communication range of the chip is longer than 7 m.