Research On Technology Of Analog Front End And Low Power Consumption In UHF Tag Chip

RFID system in ultra-high frequency is consisted of tags and readers, which using ultra high frequency signal to exchange information and achieve identification. RFID UHF system have a lot of advantages such as long distance, convenient carrying, low cost, fast speed of reading, repeatedly writing and erasing, so at the present it has been widely used in logistics management、intelligent city and other fields.This thesis mainly designs the RF analog front end for passive UHF RFID tag chip, at the same time making some improvement of the circuit for low power consumption. UHF tags communicate with reader through receiving and reflecting signals and the energy which tags need in working period is all coming from the signal emitted by readers. The father the distance, the energy received is smaller. Thus to realize the longer distance, the most important things we need to do is decreasing the power consumption of tags and improving the energy utilization.At first the thesis introduce some communication mode of the UHF RFID system based on ISO/IEC 18000 Type C protocol including the energy transmission in forward link and reverse link, the way of modulation and demodulation between tags and readers’ communication and the coding method they used. This part provides a basic theory for our design and simulation the RF analog circuit. At second we design and study every circuit in the RF front end, and analyze the advantages and disadvantages of each circuit’s performance. In order to realize the low power consumption and high energy utilization rate of the tag, some improvement on the clock circuit and rectification circuit were made. Relaxation oscillation was used as the clock circuit, and dynamic eliminating threshold technology was adopted in rectifier. Then the circuit was used the Cadence Spectre tool based on SMIC 0.18μm RF library to simulate and optimize. The results of the simulation prove the consumption of the power dropped a lot and the utilization radio improving. Finally, we complete the RF front-end circuit layout using SMIC 0.18μm CMOS process.