A Study Of FPGA Technology Application In Radar System Design

In recent years, with the development of radar technology and the expansion of related areas, radar is playing a more and more important role in human life and military. As an important part of the radar system,in recent years, Radar signal processing system has a rapid development along with the large scale introduction of DSP and FPGA. Especially FPGA has a large increase in the use of digital systems, as its parallel processing features, small size, high speed and other characteristics. FPGA already has realized the entire radar signal processing capabilities, thus the implementation of digital signal processing based on FPGA has an important position in radar signal processing. In this thesis, A study of FPGA technology application in radar system design is introduced in this thesis, focused on three parts:1. Radar signal processing algorithm and design of versatility are introduced in detail. Modern radar has more and more diverse requirements of its function. Response to this request, a signal processing system could change the operating mode according to the different needs timely is designed. For different operating modes, real-time parameters can be configured in each of the signal processing algorithm. Then the basic theory of radar signal processing algorithms are introduced in turn。 Adaptive MTD FIR filter design method is studied with emphasis, and further information of the slide MTD implementation.2. Radar signal processing detection algorithm is introduced in detail. Radar’s fundamental task is detecting target, radar signal processing’s purpose is improving detection probability. Firstly, the basic principle of CFAR is introduced. Then classified according to their treatment are investigated by means average CFAR and clutter map CFAR. For unit average CFAR, three treatment methods as CA-CFAR, GO-CFAR, SO-CFAR are studied, and further method of two-dimensional realization. For each CFAR detection method, its detection performance is studied through detection probability and detection loss.3. FPGA design of a radar system is introduced in detail based on an actual project. This radar signal processing system is consist of an AD sampling timing board andmulti-block signal processing boards. Signal processing is jointly implemented by FPGA and DSP. FPGA accomplishes the work of timing control, AD sampling, DDC, pulse compression, CFAR, and communicating with each other system. The design method of each FPGA module is analyzed in turn, the focal point in this thesis are pulse compression module and timing control module. The pulse compression module using time-division multiplex FFT cores to achieve a multi-channel with large data pulse compression. Timing control module to realize complex sequential control of radar with several operating modes. In the laboratory commissioning and filed test, FPGA working normally, the signal processing system can realize the expected function.