Design Of High-speed Image Storage And Transmission System Based On FPGA

With the continuous progress of the society and the rapid development of science and technology, image acquisition and storage system is widely used in various areas such as space technology, industry and our life. At present, CMOS image sensor is used as the image acquisition component of more and more high speed image acquisition system. Not only its acquisition speed is more and more high, but the amount of image data obtained is more and more large. So it has great significance to design a kind of high speed and large capacity image data storage and transmission system.This system takes FPGA as the main controller. Its function is reading images from a U disk and saving them into DDR2 SDRAM. Then it imitates the output signal of CMOS image sensors to send to another image processing FPGA. At last it receives the returned TLK2711 image data in four channels and send them to the computer for display by Camera Link interface. This design is divided into hardware design and software design. The hardware design mainly includes the selection of chips and the design of each module, including power network design, the configuration circuit design of FPGA and DDR2 SDRAM circuit design. The software design mainly includes five modules: the clock generation module, ARM data interface module, DDR2 SDRAM interface module, the simulation of CMOS image output module and TLK2711 data interface module. The maximum capacity of this system is 4 Gbit, and the clock frequency of CMOS image signal and TLK2711 image data are both 100 MHz.The results of simulation and test have shown that this system can work well with a stable and reliable statement. The maximum data rate for storage is 12.8Gbps. The four channels CMOS image data rate is totally 4.8 Gbps and the four channels TLK2711 data rate is 6.4 Gbps.