| The development of high-speed and high-density printed circuit boards is inevitable in electronic systems at this stage, and signal integrity and power integrity problems caused by high-speed and high-density environments can not be ignored. Based on a high-speed motor control system of high-density circuit boards of FPGA, this paper analyzes its board-level signal integrity and power integrity issues and signal integrity issues of the connector.The signal integrity and power integrity of the high-speed, high-density PCB are studied in this thesis. In the first section, the basic concepts have been clarified including high-speed, high-density, signal integrity and power integrity. And wild researches on the present situation of integrity signal and power integrity have been done, and then the paper analyzes the causes and manifestations, such as crosstalk, reflections, and simultaneous switching noise. Also further studies of these manifestations have been done by anynazing the leading factors and the way to reduce the adverse effects.Secondly, the laminated structure of the PCB is analyzed and then designed. By analyzing the type of transmission line and calculating the characteristic impedance, the paper obtains width and thickness of transmission lines of different signal layers and pre-estimates the side effects of crosstalk. According to the principle of 3W,3H and cabling requirements, placement and routing design are completed. Based on the programmability of FPGA a high and low speed hybrid model is established. And depending on the different timing requirements of motor control signal lines and SDRAM signal line, select an appropriate IBIS drive model, upon which the time-domain circuit model is created, helping to obtain the transmission characteristics of the transmission line. Also multiple transmission lines are selected to carry on adjacent crosstalk analysis.Then, the FPGA load is optimized. By calculating the Z-f curve and power supply ripple, and analyzing the pros and cons of the two different load programs, the load method is finally decided. According to the Z-f curve, decoupling network is designed by adding decoupling capacitors to reduce the target of the impedance to reduce the power supply ripple. On the basis of the design of the decoupling network and optimization of load and on the point of theoretical analysis and simulation, the thesis analyzes the influences of via structure on the PDN and gets access to the ideal size of the inside diameter of via, pads and anti-pa. And so comes to the point that in addition to the traditional design methods of the optimization of load and adding decoupling capacitors, it can also be optimized by changing the via structure.The connector between the motor control board and the motor is simulated.3D model of the connector is built using the simulation software. utilizing the method of combination field and circuit, the S-parameters are calculated and then extracted and imported to time-domain simulation software, which contrinutes to obtain the transmission characteristics of the connector. Take adjacent pairs of pins and simulate the crosstalk effects. Compared to traditional methods to optimize impedance matching, the limitations of impedance matching method are pointed out; by adopting the method of switching from high speed to low speed, optimizing transmission characteristics of the connector is completed, making the connector have better application in the PCB.According to what have been designed in the former simulation, some process is made to obtain a real PCB. By testing the finished PCB using the oscilloscope, transmission characteristics of the single transmission line is obtained.And compared with the simulation results, the good transmission characteristics of thePCB transmission line are verified.Test the power supply ripple of pins at both ends of the capacitor, And it is also be verified that the power ripple of the PCB meets the application requirements, and has good power integrity. |
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