Study Of Signal Integrity, Power Integrity And Electromagnetic Compatibility In High-Speed PCB

With the fast development of high-speed digital circuit and high-integrated chip technology, signal integrity (SI), power integrity (PI) and electromagnetic compatibility (EMC) problems become increasingly serious. These problems bring great challenges to the system hardware design, and designing high-speed PCB with good SI, PI and EMC performances has become the dominant factor of system design. This thesis focuses on how to solve SI, PI and EMC problems in high-speed PCB design.Firstly, the SI, PI and EMC problems of high-speed PCB design are introduced. Then, the present research status is summarized.Secondly, based on the introduction of basic transmission line theory, signal integrity problem is stated, including reflection, crosstalk, etc. The timing constraints for common-clock and source synchronous bus architectures are described. The effects of termination methods in common use are simulated; the influence of variation of some parameters to crosstalk in two coupled transmission lines is analyzed, including spacing, line length, thickness of dielectric layer, etc.Thirdly, the origins of simultaneous switching noise are introduced in detail. Then, this thesis presents the design method of power integrity. To make power distribution system maintain the target impedence, the selection of decoupling capacitor is refined by performing single-node analysis and the placement of the selected capacitors is refined b> performing multi-node analysis.Fourthly, Electromagnetic compatibility in high-speed PCB is studied; the mechanism and design techniques of electromagnetic radiation are stated in detail.Finally, this thesis presents the high-speed PCB design method based on SI, PI and EMC analysis by using Cadence PSD15.0 tool suite. Then, the acquisition and validation methods of IBIS model are introduced.Conclusions drawn in this thesis are useful for the high-speed PCB design and other correlated works.