A 12-b 60MHz Pipeline ADC In 40nm CMOS

High performance analog-to-digital conversion circuit(ADC) is a product of typical digital circuits and analog circuit combination,also it is the integral part of digital signal processing and the single chip (SoC).The analog signals can be seen everywhere in nature, can be perceived by us,the digital signals are easy to transfer processing,and has strong anti-interference ability, the ADC works by turning the analog signals into a digital signal, and take it to the next unit.This paper gives a whole design scheme of 12bit 60MHz pipeline ADC based on SMIC 40nm CMOS process.First this paper introduces the principles and performance comparison of several common ADC, and introduces the structure, principle and performance advantages of Pipeline ADC.Then this paper explain the working principle, design scheme and the pre simulation results of some important modules of pipeline ADC,such as two non-overlapping clock phase circuit, sample and hold circuit,1.5bit each grade level circuits, opamp circuit, comparator circuit, delay calibration circuit, band-gap reference circuitAt the end of this paper, the layout design and post simulation results of the whole circuit in the 40nm CMOS process are given.