Research And Design Of A Sigma-delta DAC For UHF RFID Systems

With the rapid development of integrated circuit technologies, a sigma-delta DAC is graduallyreplacing a traditional DAC and has been widely used in high-precision audio processing, video,communication systems and other fields, owing to its higher resolutions and easier integration. Anarea-efficient sigma-delta digit-to-analog converter (∑-△DAC) used in Ultra High Frequency(UHF) Radio Frequency Identification (RFID) based on ISO/IEC18000-6C protocol is presented inthis paper. The design consists of three parts: an interpolation filter, sigma-delta modulator and ananalog low-bit DAC.The interpolation filter is composed of a compensation filter, a halfband filter and a cascaded-integrator-comb (CIC) filter to reduce the complexity of the system. In addition, a novel method ofcanonic signed digit (CSD) coding is used on the former two stage filters that the multipliers arereplaced by simple shifters and adders to reduce the power consumption and area of the filter.Finally the structure of CIC filter is optimized to further decrease the power consumptionefficiently.An error feedback (EFB) structure with4bits third-order is used and the stability condition ofthe structure is analyzed in the paper. Based on the quantization noise model of the signal, the linearanalytical model of sigma-delta modulator is established and the comparison of the basic structureof the modulator is presented. Finally, the simulation demonstrates that the modulator achieve morethan70dB SNR, and thus better inband noise is suppressed.After simulated system in the Matlab,the whole digital design is implemented with coding, synthesis, auto place&route and other digitalASIC design process as well as FPGA verification.A current steering DAC is used to achieve a4-bit digital to analog conversion. The thermometercoding is empolyed to complete the4-bit conversion by15levels. Bandgap reference voltagesource with current-mode architecture to work at low supply voltage has better temperaturecharacteristics and high power supply rejection ratio.With the resolution of10bits and16times oversampling ratio, the DAC works at the highestoperating frequency of48MHz in standard0.18μm CMOS process. Simulation results show that theSNR reaches70dB and the effective number of bits achieves10bit, meet the requirements ofsigma-delta converter used in UHF RFID reader.