Design Of High-speed Data Acquisition Of CMOS Image Sensor Based On FPGA And USB3.0

Nowadays, high-performance CMOS image sensor has been widely used, theperformance of high-speed data acquisition system is also put forward higher request,so it is of important significance to do research on high-speed data acquisition.High-speed data acquisition and real-time transmission are two main contents in theresearch of high-speed data acquisition. The development of FPGA provides a bettersolution for high-speed data acquisition. Meanwhile the extensive application ofUSB3.0provides a new way for high-speed data real-time transmission.The high-speed CMOS image acquisition system is based on high processingability of FPGA and high-speed transfer characteristic of USB3.0interface. Theworkflow of the system are as follows: once multi-channel data generated by theCMOS image sensor is received, FPGA send the data to the DDR2for cacheimmediately, then the data will be transferred to the PC host through USB3.0interface controlled by the FPGA, the host will display the image as soon as itreceived the image data.Considering the characteristics of output data generated by CMOS image sensor,we can get the similar data by using FPGA evaluation board with Verilog HDL design,which including line valid signal, frame valid signal, pixel clock and so on. Then thehigh-speed image acquisition board will get the data through multiple-channel LVDSsignal. During the design, a multi-layer board is used so that can meet the signalsegmentation and plane segmentation to prevent crosstalk, the requirement of thehigh-speed signal transmission integrity. In the design, FPGA is in charge of thewhole system, and data cache is realized by calling the internal IP core to control theDDR2, and the FX3type USB3.0interface designed by the Cypress is in charge ofdata transmission; In the system, user interface is designed by the Labview which supplied by the NI to control acquisition of data then transfer the data to image anddisplay.This paper shows the whole system mainly in two parts: the part of hardware andthe part of software. In hardware part, the paper describes the peripheral circuitdesign of FPGA, DDR2, USB3.0, and matters need attention of the power moduleand multilayer PCB design, then gives the overall layout and physical figure; Insoftware part, the paper shows the whole system first, then introduces the parts of theprogram in details. The sequence of software design is from FPGA firstly, USB3.0interface is secondly, and finally is the PC software design.Through the whole test and the function verification of system, the results showthat the design can realize high speed data transmission of CMOS image, andcomplete the design excellently.