Research Of CMOS Frequency Syntheszier For Multi-standard Wireless Communications

Nowadays, more and more wireless communications standards keep emerging in our space environment. Therefore, one RF transceiver that can support multiple standards becomes an attractive research topic both in industry and academic. In general, this thesis describes a frequency synthesizer for multi-standard wireless applications, that supports wireless standard including DVB-T、GSM900、DCS1800、 TDS-CDMA、WCDMA、GPS、Bluetooth and802.11a/b/g, with specially focus on several key design issues and finally the synthesizer is implemented using CMOS technology.This thesis firstly discusses the architecture of the frequency synthesizer, calculates the specifications of the synthesizer. Then, the different arthitectrues of multi-standard synthesizers are compared, a power-efficient synthesizer arthitecture using a novel dual-mode VCO is proposed.The design methodology of the phase-locked loop (PLL) is briefly introduced followed by the design example of a3-6GHz PLL in this work.A dual-mode VCO is proposed in this work, and the choice of VCO topology as well as the optimization design of phase noise are dicussed properly, at last speciall efforts are on the discussion of the phase accuracy and frequency shift when two different VCOs are coupling with each other. The study of the VCO automatic frequency calibration (AFC) technique is presented with speciall focus on the AFC for dual/dual-mode VCO and VCO/AFC co-design methodology. Finally, the other circuits in synthesizer like divider chain, quadrature single-sideband mixer and output multiplex are briefly discussed.The synthesizer is implemented in a0.13um CMOS technology with tuning range from0.375-6GHz which covers all the operation frequency band of the standards mentioned above. The measured phase noise performance gernally meets the specifications of most standards except GSM, DCS and802.11a. In quadrature mode, the image rejection ratio from mixer output is better than36dBc which meets the requirement of802.11a. The active core of the synthesizer is about1.50X1.53mm2, the loop bandwidth is ranging from30-100kHz, the reference spur is less than-70dBc. The synthesizer consumes36.5-59.2mW from a1.2V supply.