Reconfigurable System Platform And Ip Design And Implementation

As a new promising solution for computation intensive application, Reconfigurable Computing (RC) could retain the speed of dedicated hardware while providing a great deal of flexibility. It can be used in computer vision, mobile device, Software Defined Radio, etc. In reconfigurable system, hardware module can be called or configed dynamically like software. This resulted in a hybrid computer structure combining the flexibility of software with the speed of hardware.This thesis introduces some researches on partial reconfigurable system based on FPGA, which includes the following parts.Firstly, the recent development of reconfigurable system is introduced as well as thecategories and reconfiguring methods. The designing flow for this kind of system arediscussed in detail.Secondly, based on Xilinx Virtex-II Pro FPGA which are dynamic reconfigurable, theessential parts and developing environment of AES dynamic reconfigurable system arepresented.Thirdly, the present design methods applied in dynamic reconfigurable system aresummarized and classified, including the respective application occasions.Fourthly, after configuring and setting the XUP board containing Xilinx Virtex-II Pro FPGA,the hardware interface tasks are researched through the ASE encipher and decipher.Arelatively general-purpose interface module is implemented as well as the demo experimentson a dynamic reconfigurable system which can be managed and configured.Finally, according to the specific requirement of the experimental data and the system, aprototype for reconfigurable computing is designed based on Virtex-4 FPGA.