The Influence Factors About Mismatched Voltage Of SAC In SRAM

With the rapid development of science and technology, as a typical representative ofmicroelectronics products, Semiconductor memory has been more and more used in avariety of consumer electronics. In recent years, with the advantages of fast speed and lowpower consumption, static Random Access Memory (SRAM) has become theindispensable part of the semiconductor memory.This paper firstly introduces the classification and the development situation of thememory, from Moore’s law to Kissinger rules. Second, emphatically analyzes the basicstructures of SRAM, from the basic framework to various modules, and introduces thedesign methods of the different structure of the unit cell, this paper uses6T unit cell as anexample, timing based, analyze several margins, such as read margin, write margin, staticnoise margin and so on. Then through several different types of sensitive amplifier, weanalyze how it works, and summarize the advantages and disadvantages, especially thelatch type sensitive amplifier in this paper. Analyses the reasons of the mismatch as well asthe method to reduce it, under the deep submicron process, the mismatch voltage isaccording to a random Gaussian, since reducing the average of the sensitive amplifiermismatch voltage amplitude space is very small, yield mainly depends on the standarddeviation of the voltage mismatch distribution. With the design and simulation of cell andsensitive amplifier, we can get the mismatch voltage value of the sensitive amplifier tomeet the yield.And finally we do the optimization of the whole SRAM.