The Analysis And Design Based On Replica-bitline And SA For Resisting The Process Variation

With the rapid development of integrated circuit(IC)industry,high integration,high speed and low power consumption have become the trend of integrated circuit development.High integration requires a smaller semiconductor process size,but smaller process sizes can cause large process variations.In order to achieve the low power consumption,the supply voltage is declined.However,the reduction of power supply voltage increases the impact of process bias on the circuit.SRAM is an important component of IC.The impact of process variation will increase process deviation and has a serious impact on the performance of SRAM,especially for SRAM operation speed,power consumption and stability.In view of the problems caused by these process variations,some improvements in resistance to process variations have been made from the replica bit-line and the sense amplifiers.The main research work of this paper is as follows:Firstly,the basic frame structure and working principle of SRAM are analyzed.Then,the effects of process deviation on the timing signal and sensitive amplifier are analyzed.Basing on the analysis of the two aspects,some measures have been proposed to improve the effects of process deviation on the timing signal and sensitive amplifier.The results of simulation and comparison have been given on SIMC 28 nm process.Aiming at the negative effect of the process variation on the SRAM circuit,this paper proposes an improvement from the replica-bitline and the sense amplifier.First,a pipeline replica-bitline delay technique with trigger controller is proposed to reduce the process variation.Then,from the aspect of the sensitive amplifier,a sensitive amplifier circuit with self-feedback substrate adjustment to resist the process variation is proposed to reduce the effect of process bias on the offset voltage of the sense amplifier.In order to verify the performance of the proposed circuit,we use the Monte Carlo simulation method to simulate the circuit,compared with the traditional simulation results of the replication bit line technology,with a flip-flop replication bit line technology to reduce the process bias.Compared with the traditional voltage sensitive amplifier,the offset voltage of the sensitive amplifier with self-feedback substrate adjustment is reduced by 31.73%.