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The Analysis And Design Based On65nm SRAM For Low Offset Voltage Sense Amplifier

Posted on:2015-01-12Degree:MasterType:Thesis
Country:ChinaCandidate:H ChangFull Text:PDF
GTID:2268330428468700Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Sense amplifiers (SAs) have been widely used in many different kinds of digital circuits such as SRAM, DRAM, I/O for the functions of detecting and amplifying a small input differential signal to a full swing signal. The structures of SAs are very in different application fields. This paper is focused on the design of sense amplifier which is the key module in the SRAM system.The performance indexes of SAs mainly include offset voltage, yield, speed, power and area, wherein the offset voltage is the most important parameter. As the development of CMOS technology, the imbalance of the sense amplifier which can amplify the input signals into the wrong directions is caused by the mismatch of process parameter in the transconductance, threshold voltage or bitline load capacitance, Therefore, it has more higher-requirements for the design of sense amplifier.First, this thesis analyzed the emphasis and difficulty in the design of SA under advanced process, and then several kinds of typical sense amplifiers including their merits and demerits have been introduced and summarized. Second, for resolving the offset voltage problem in common sense amplifiers, this paper proposed a new offset voltage model which approximated the transistor current into a first order linear curve with the integral mid-value law and obtained the offset voltage calculation formula of the latched sense amplifier. By comparing the Hspice simulation results with the calculated results from the model, it is obvious that this model can perfectly describe the offset voltage of the latched sense amplifier, so this model had advantages of high accuracy. Based on the analysis of offset voltage, this paper proposed a new low offset voltage sense amplifier which balanced the discharge speed of the internal nodes by adding two fine-tuning way in order to achieve the purpose of reducing the sense amplifier input offset voltage. Under the process conditions of TSMC65nm, the Monte Carlo simulation of the input offset voltage was conducted and the simulation results showed that the proposed new sense amplifier had a lower offset voltage.
Keywords/Search Tags:sense amplifier, mismatch, offset voltage
PDF Full Text Request
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