Designing Of The Host Computer Debugging System Based On The PCI Express Interface

At present, the airborne radar information processor possesses powerful function,complex processing modes and multiple testing and verifying procedures, thus the hostcomputer systems should have the ability of function expansion and meet the demandsof the information processor at different R&D phases. The processing ability,communication ability and easy operation of the host computer system are inever-increasing demands.FPGA has become the core components of many embedded systems owing to itswell adaptability and scalability. The virtual instrument technologies is widely used indebugging, testing and control fields for its simple programming and friendly interface.Through development of a decade, the technologies of PCIE bus as the representative ofthird-generation data bus are becoming more and more mature and has been widelyused in many fields for its good transmission performance. Based on PCIE interface,combined with FPGA and virtual instrument software LabVIEW, this article havedesigned and realized a common-used host computer system. The main content is asfollows:Introduction account for the background and significance of this article and gives abrief introduction of the relevant technologies.Chapter2analyzes the requirements for the host computer system during differentstages of development of the air-borne radar system information processor. Hardwareand software implementation scheme of the host computer system is proposed and thehardware and software architecture is designed. The technologies used in the system isanalyzed and verified to ensure the feasibility of the system.Chapter3presents the design and implementation of the data communication link.The PCIE interface, master and slave port of the Wishbone bus are programmed andrealized using the FPGA-embedded PCIE hardcore endpoint block and VHDL language.The validation and stability of data communication is tested using Chipscope. Themulti-channel data communication links between the host computer card and FPGAmodules and links between FPGA modules and DSP are realized using LVDStechnology and custom communication protocol. The actual using of it indicate thatcommunication rate and error rate of the data link and other indicators meet therequirements of the system.Chapter4presents the design and implementation of the host computer softwaresystem based on LabVIEW. Underlying drivers are developed based on LabVIEW; Datatransfer protocol is designed and the data packages for system application is defined.System debugging, data playback and simulator control of the controlling interface ofmulti host computer system is designed and realized according to the requirements. The host computer system developed in this paper has been successfully used inthe development of a information processor of an air-borne radar system. Theexperiment shows that the host computer system is of good real-time ability, versatilityand scalability. The host computer system can be widely used in the monitoring anddebugging of real-time signal processing system.