Design And Implementation Of Intelligent Serial-Port Based On FPGA

This paper describes the design and implementation of an embedded navigationsystem based on Digital Signal Processor (DSP). Initially, with the analysis on the chipstructure and developing instance of DSP of TMS320C6713, the peripheral circuitaround the core processor is designed. Besides, the software environment of ExternalMemory Interface (EMIF), interrupt as well as Phase Locked Loop (PLL) is initializedon DSP/BIOS.The coding among components of all sorts and serial data transfer with off-chipdevices are all controlled by Field-Programmable Gate Array (FPGA). According to thefeature of FPGA of XC3S200AN-4FT256, the framework of the DSP+FPGA system isimplemented by the interface between FPGA and DSP, on which the IntelligentSerial-ports Module is designed based. With the serial communication protocol andadditional buffers inside the FPGA, the limited amount of serial interface are extendedso that the controller can assume the serial data transfer of full-duplex among8channels(2of RS-232and6of RS-422). In particular, in the respect of data receiving, the serialdata can be intelligently controlled by the soft IP core transplanted into FPGA. It is notmerely1024Bytes buffer can be provided to each data channel but analysis andpre-processing on original data to some extent can be carried out by it, such asextracting key data from original data frame, discarding current invalid data framepromptly and calculating or combining some data beforehand. Due to it, the coreprocessor can acquire data more effectively and efficiently.Finally, the simulating and testing for the logic designment of every module basedon FPGA are carried out respectively.