Design And Optimize The Key Circuits Of Flash Memory

In recent years, flash memory has been widely applied in the field of electronic information because of its excellent features.With the development of information society, the information industry is developing in a direction toward the calculation of the mass of information, storage and transmission.This requires the development direction of flash memory technology is large-scale, high speed, low power, low cost.Floating gate type memory design is facing challenges because the process feature size decreases.First, the low supply voltage increases the difficulty of design;Second, as the storage capacity increases, the read path has a more significant parasitic effects;Third, the process fluctuations are inevitable.These issues are closely related to the design of the peripheral circuit and the read path.Thus, firstly the this paper study the working principle of the NOR FLASH in-depth.Focus on the design of the peripheral circuits of the NOR FLASH.Design and optimization the read path.Reserve the Trim value to fight against process variations.The main work and achievements are as follows:1. Research the working principle of floating gate transistor, and describe the programming, erase algorithms of NOR FLASH in detail.2.Design several important peripheral circuits, they are:(1)Two kinds of reference voltage source, one is the high-precision second-order curvature compensated reference voltage source, and the other is a reference voltage source which antis process variations and works in the standby mode;(2)A VDC circuit, which enhanced transient response;(3)Improve the level shift circuits.3.Design and optimize read path circuits, they are:(1)A new reference current source circuit;(2)Current-to-voltage circuit;(3)lmprove sense amplifier.4.Consider the read path parasitic effects and optimize the read path.5.Design special read circuit to read Trim values.