Research And Implementation Of NAND Flash High-performance Read-write Algorithm

With the continuous updating of mobile phones,the memories for large capacity,low cost and low power is increasingly important.In the development of memory technology,NAND Flash technology tends to multi-level and three-dimensional.As the next generation of NAND storage technology,three-dimensional memory has become a research hotspot,however,its reliability of miniature are facing many uncertain challenges.For multi-level storage,the common source line(CSL)noise is higher to hundreds of milliampere in the large-scale current sensing operation.The CSL noise not only shifted the threshold distribution to right,but also broaden the threshold distribution which decrease the read margin.On the other hand,with the increase of storage state and the enlargement of memory array,the CSL noise is increasingly bigger,as a result,the read margin is getting smaller.Read margin is the primary factor that causes the read error.This paper mainly discusses read error caused by read margin,and reduces the read error by the algorithm.The implementation of the algorithm bases on page buffer.The page buffer is the core part of a NAND flash memory.Its structure and its corresponding algorithm achieve program,read and erase operation of NAND flash memory.In this paper,by analyzing and summarizing the page buffer characteristics from Samsung,Hynix and Toshiba company,a page buffer circuit was improved and a read algorithm for this circuit was proposed.To reduce the effect of the common source line noise in read operation of NAND Flash Memory,a page buffer circuit which can realize the C/F read operation is proposed and a C/F read algorithm suitable for the page buffer circuit is introduced and implemented which can reduce the common source line noise significantly.There are two sub-read operations in the algorithm,the purpose of the first sub-read operation is to distinguish the cells with low threshold voltage and mark them in page buffer circuit.These cells are no longer sensed in the second sub-read operation.As a result,the threshold voltage shift caused by the common source line noise is suppressed.The circuit simulation results show that the page buffer structure which supports the C/F read algorithm can reduce the common source line noise more than 495.6mV and the read accuracy of NAND Flash Memory is greatly improved.