Design And Implementation Of Dvb-c Digital Qam Receiver Blind Equalizer

In this project, an all digitized QAM receiver chip based on DVB-C system is made with the cooperation of Chengdu Chinaray Electronic Co.Ltd. The hardware system is based on the Stratix series FPGA chip of Altera Corporation and the core tasks include matching filter,carrier recovery and timing synchronization,symbol synchronization and blind adaptive equalizer of all digitized QAM receiver.This paper will introduce the principle of the DVB-C series standards firstly,then the sketchy design of the system will be stated. At last, the software and hardware parts of the system will be discussed in detail, especially the algorithm design and FPGA implementation of blind adaptive equalizer. What I have done in the project are listed below : A): Read papers associated with my project and get familiar with basic principal of the system.B): Complete the design of byte to symbol mapping,differential encoding and constellation to I,Q mapping of transmitter of software simulation system。 C): Complete the design of blind adaptive equalizer ,differential decoding and I,Q to constellation mapping of receiver of software simulation system。 D): Using Verilog HDL language to implement blind adaptive equalizer programming ,testing and debugging.E): Take part in software and hardware system testing and debugging.The software simulation of this system has been tested, and the sub_modules of hardware Verilog programming have been completed.