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Research And Implementation Of Profile Mode In The Integrated Circuit Reliability Analysis

Posted on:2014-08-05Degree:MasterType:Thesis
Country:ChinaCandidate:X H FuFull Text:PDF
GTID:2268330425495414Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the gate oxide thickness and the dimensions scale shrinks to nanometer level in integrated circuits, the reliability problems of MOSFET becomes a main concern during the chip design life cycle. RelXpert, a Cadence reliability simulator, focuses on Hot Carrier Injection (HCI), Negative Bias Temperature Instability (NBTI) and Positive Bias Temperature Instability (PBTI) simulation. But when calculating the case that the external pressures (e.g. temperature, voltage etc) are varying, or thinking about self-limiting effect of device degradation, this tool will over estimate the degradation and lead accuracy issue. This thesis designs and implements RelXpert profiling simulation flow in order to solve the issues and get correct results.At first, this thesis introduces the theory of the three key effects in the MOSFET degradation, reliability modeling, traditional reliability simulation method and flow. In order to avoid the stress variation and self-limiting effect problems, the profiling method be designed based on the real device degradation processes. It adopts a configuration file, which specifies different stress according to circuit/device work environment in truth, modifies the reliability model parameters, and handles the circuit netlist and aged model parameters step by step to improve the simulation accuracy. In the project implementation, it designs four kind of method for age setting according to different habit and requirement. The flow has been integrated into Cadence Analog Design Environment besides the command line mode for the simulator usability. In the verification and validation part, the profiling method is proved that it can get same results as expectation, has better simulation results than traditional method and the self-limiting effect is automatically kicked. Meanwhile, this thesis has a study on the relationship between external stress condition and device degradation, and sequence simulation.A profiling reliability simulation method is developed and implemented into RelXpert. This method makes it possible to take into account the self-limiting effect in device degradation and do voltage/temperature profile simulation with RelXpert. With this method, designers can more accurately simulate circuit reliability and maximize design performance. In short, this method improves the product accuracy and usability.
Keywords/Search Tags:device reliability, hot carrier injection, bias temperature instability, self-limiting effect, profiling reliability simulation
PDF Full Text Request
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