NAND Flash Controller Design And Transaction-level Verification Based On Systemc

With applications such as the mobile terminal device, the high reliability storage andhigh-performance storage services for small, light weight, and zero-noise, high-reliabilitymemory increasingly strong demand, storage devices based on NAND Flash devices occupyan increasingly important position in the storage market. NAND Flash controller realize thefuctions that is accessing control and error control of memory chips.It is vital significance toimprove the chip integration, reduce cost and improve system reliability in the current systemof single chip embedded in NAND Flash controller.In this paper, we design and implementthe IP core of NAND Flash controller with error control function.We verify NAND Flashcontroller by the transaction-level verification method based on SystemC.Firstly, we aim at NAND Flash memory chip MT29F4G08AAA that product by MicronCompany and design the IP core of NAND Flash controller. By analyzing the NAND Flashinterface signals and operation timing we will split each operation for several basicsub-operations, mainly includes writing command operation, writing address operation,reading data operation and writing data operation. Performing one or more sub-operationcomplete the data access to NAND Flash. In order to improve the reliability of the data, wedesign ECC (Error Correcting Code) module.By data on the writing and reading of NANDFlash it performs error control coding to achieve detection of several bits error and correctionof a bit error. Based on system level description language SystemC transaction-levelverification methods, we build the system-level verification environment that is used to verifyNAND Flash controller and do a more complete verification.We implement Verilog HDL and SystemC hybrid simulation by using ModelSim.Byanalyzing the resulting waveform diagram and simulation data, we implement thesystem-level function verification of the NAND Flash Controller IP Core.As paper workshows, transaction-level verification technology based on SystemC can achieve the purposeof the verification work carried out early in the system design. Verification efficiency relativefor RTL verification technology also significantly enhance.