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The Design And Verification Of NAND Flash Controller Based On OPB General Bus

Posted on:2010-12-16Degree:MasterType:Thesis
Country:ChinaCandidate:S WangFull Text:PDF
GTID:2178360275482086Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
FLASH memory sales continue to grow in recent years, NAND FLASH is now the main nonvolatile flash memory technology in the market,but it has problems such as complex control sequence and bit reversal. This paper developments NAND FLASH controller on the basis of analysing the NAND FLASH own shortcomings, and also adds an OPB general bus interface for the controller,making the controller can be used as a slave equipment of the OPB general bus, so the controller can be used for SOC design easily.Firstly, after researching the current situation and the development trend of the FLASH memory product, the own shortecomings of NAND FLASH is pointed out, the advantages and disadvantages are pointed out By comparing the NAND FLASH and NOR FLASH, the significance of developing NAND FLASH controller based on OPB general bus is described on this basis.Secondly, the technical basis for controller design is discussed through the analysis of organizational structure, command operations and AC characteristic parameters, then the OPB bus technology and the characteristics of SOC technology are described.Thirdly, the design and implementation of the bus interface module and control module is completed according to the basic design requirements of the controller, and modular design concept is used by the controller. The decoding module, data FIFO module, address FIFO module, main control module are described in detail. The realization method of clock control module is discussed specifically, the design and realization process of the state machine of the control module for realizing the page read command, page program command, block erase command, ID read command, reset command is described. According to the principle of ECC algorithm, the realization method of ECC code generation,ECC error detection and correction is proposed.Fourthly, the verification environment and the various parts of it are introduced, the RM module is emphasized introduced, and the implementation of checking AC characteristic parameters and FSM is described in detail. The method of ECC functional verification is described on this basis, the results of operating instructions functional simulation are given. Fifthly, the synthesis and route place result of the controller are proposed, both the resources occupied and the result of static timing analysis are introduced, the application environment is discussed. The command functions of the NAND FLASH controller based on OPB Bus are tested in a SOC environment, the results of the testing are given.The final test result indicates that the functions of the designed NAND FLASH controller based on OPB general bus such as block erase command, page read command, page program command, ID read command, status read command, reset command reach the expected requirement.
Keywords/Search Tags:NAND FLASH, Controller, OPB General Bus, ECC, FSM
PDF Full Text Request
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