Image Processor Hardware Testing Platform Design&Implementation

A lot of breakthroughs and progress in space technology have been made in recentdecade in our country. Along with the development of space technology, the spacebornepayload increases continually and the quantity of remote sensing image data gets muchlarger. As a result, the image data to download is enormous now. Faced with such a largevolume of image information, the Consultative Committee for Space Data Systemsproposed a new compression algorithm called CCSDS. This platform provides simulationenvironment for image processor board based on CCSDS compression algorithm. Thisarticle put forward a hardware test platform using DSP as the central processing unit.The image processor board receives PAL analog video at first, and next process isanalog-to-digital conversion. Then the digital video data is going to be encoded byCCSDS compression algorithm. After that the board will output data through RS422serialport at the data rate of1843200bps. Therefore, we designed a test platform for imageprocessor board. It provides analog video data for the board and uploads thecorresponding digital video data to PC. Meanwhile, platform also uploads encoded streamreceived from the board to PC. The stream will be decoded on PC. By contrasting originalimage and the decoded image, we can figure out the performance evaluation of the imageprocessor board.The test platform design includes the design of the hardware platform and thesoftware design on PC. Hardware platform design has6modules, including image capturemodule (AD), central control module (DSP), input/output interface module (UART), datastorage module (SDRAM), power level conversion module(MAX3044/3095) and powermodule. Software design includes two parts，data stream receiving software and imagedecoding and performance evaluation software. The first part receives the data via twoserial ports, and the other decodes the compressed code stream and analyze the decodedimage and original image contrastively. The result of experiment shows that the test platform can verify the performance ofthe image processor board and it can be used through a very user-friendly interface. Theplatform can get the correct compressed code stream of image processor board andanalyze its coding performance.