Design Of Encoder And Decoder Of IRA-LDPC Codes Based On Residue Class Pairs

Low-density parity check (LDPC) codes is the best error correcting code whichapproaches Shannon‘s capacity limit. LDPC code has good asymptotic performance, withdecoding complexity linearly proportional to the codes length.This paper supported by National Natural Science Foundation of China―The Research ofKey Technology in Noncoherent MIMO Communication System‖, studies design of encoderand decoder of IRA-LDPC codes based on residue class pairs showed in [50]. BP algorithm,Min-Sum algorithms and two modified Min-Sum algorithms have been studied.Simulation results show that the performance of modified Min-Sum which has onlyaddition and comparison operations can reach0.1dB as close as about to BP. So Min-Sumalgorithms have the good balance between the complexity and performance.On the basis of Check matrix of IRA-LDPC codes, a low hardware complexityencoder structure is designed. The encoder design greatly reduces the storage of the paritycheck matrix and has the advantages of low coding delay.Finally, the decoder which is based on Offset-Min-Sum algorithm is designed forIRA-LDPC codes with. On the implementation of Offset Min-Sum algorithm, decoderdesign greatly reduces the storage of the intermediate variables and optimize the storageunit.The decoder has a degree of parallelism L. Based on the cycle characteristics of checkmatrix of IRA-LDPC codes, the paper designs a suitable storage architecture which is veryconducive to the implementation of shuffle network and RAMS memory addressing. Theimplementation of the variable node calculation unit and a check node calculation unit isregardless of the type of LDPC codes. Simulation showed that the6-bit quantization forNodes information can achieve a good compromise between performance and complexity.