The Design Of1.65Gbps Data Generation Module Based On Dynamic Storage

The data generator can produce the depth programmable seamless data export.So it is widely used for the test of various kinds of electronic equipments as theexcitation sources in electronic test system. With the rapid development of theelectronic technology especially the digital technology, the devices under test appearcomplex, intelligent and high-speed trend. So the development of modern electronictechnology requires the data generator to be provided with faster data rate, deepermemory depth and greater programmability.This paper combining with the projects ‘some kind high-speed data generator’which is assumed by the university of electronic science and technology research thetechnology of1.65Gbps high-speed data generating and complete the design of thedata generating module. Due to the technology difficulties of deep storage (512Mbits),high-speed and seamless export put forward a program which sets the FPGA as thecontrol core. The program takes use of large capacity the feature of dynamic memoryto solve the deep storage problems. Use the speed difference to exchange the refreshtime of dynamic memory. The program takes use of buffer to solve the problemdynamic memory burst read and write with seamless data export. At the same time thehigh-speed reading features of dynamic memory combine with the technology ofparallel to serial to complete high-speed serial data generating. The main content ofthis paper include:i.Discuss the significance of this paper with referring the current situationsworldwide together. Analysis the difficulties in design of generating high-speed datastream, then put forward a way to resolve the difficulties. Put forward the wholegrogram of high-speed data generation according to the requirements of functions,indicators and the way to resolve the difficulties.ii.Complete the design of system hardware circuit, including clock circuit, interfacecircuit, memory circuit, parallel to serial circuit and control circuit.iii.Complete the design of timing circuit, including decoding the data from hostcomputer, control memory to read and write, control clock circuit to generate thesignal of clock, export Patten data, export the signal of synchronous trigger and exportseamless data. iv.Complete debugging the whole grogram and electric circuit.At last summarizethe whole project and program and put forward the improved project.