Design Of COMS Bandgap Reference With Digital Self-calibration

Based on the techniques of trimming and chopping, combined with the principle ofsuccessive approximation digital-to-analog conversion, a digital self-calibrated bandgapreference (DSC-BGR) that can calibrate the offset voltage caused by componentsmismatch is designed. The initial accuracy of the bandgap reference (BGR) is improvedwith this design.Firstly, the principle of temperature compensation and the features of BGR areintroduced. Two kinds of typical structures of BGR are proposed, and one of them isanalyzed about components mismatch. Two methods which are trimming and choppingfor calibrating components mismatch are presented.Secondly, the design idea of the DSC-BGR is introduced. Compared with theexternal trimming and the chopping technique, the DSC-BGR which can self-calibratein a short time after power on do not need to encode-calibrate individually, and both ofthe power dissipation and noise are lower. Then，system architecture is presented andthe main modules include bandgap core with trimming array, switched-capacitor circuit,comparator, successive approximation register, control circuit and power on reset circuit,etc. Also, the detailed process of the system is introduced.Thirdly, based on65nm standard CMOS process, the sub-module as well as thesystem of the DSC-BGR are designed and simulated. A6-bit resistor trimming array isadopted for calibration in the bandgap core. The technique of charge injectioncancellation is used for the design of switched-capacitor circuit. A high-accuracycomparator which is made of a latch and a pre-operational amplifier with output offsetstorage is presented. A6-bit successive approximation register with the function of shiftand a control circuit with the function of counting are designed by D flip-flops and logicgates. Power on reset circuit consists of the power detection circuit, shaping circuit andpulse generating circuit. System is simulated by using Monte Carlo model. Withoutcalibration, the average output voltage of the BGR is1.2071V and the standarddeviation is50.6mV. While, the average output voltage of the BGR is1.2053V and thestandard deviation is reduced to1.2mV after self-calibration. In other words, the3σ inaccuracy of the BGR is improved from±3.99%to±0.30%with the calibration.Finally, the layout of the DSC-BGR is design in a standard65nm1P5M CMOStechnology, and the circuit occupies0.036mm2. The output voltages of49prototypesare measured. Before self-calibration, the average output voltage of the BGR is1.2019V,and the standard deviation is21.5mV, so the3σ inaccuracy is±5.36%. However, theaverage output voltage of the DSC-BGR is1.2043V and the standard deviation isreduced to4.4mV, so the3σ inaccuracy is±1.11%. The power dissipation of the systemis less than500μW in the mode of self-calibration, and the stable power dissipation isabout80μW after self-calibration. Before and after self-calibration, the temperaturecoefficient is about20ppm/°C, and the power supply rejection ratio is better then-50dB.