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A Design Of 14-bit DAC Embedded With High Performance Bandgap Reference

Posted on:2008-11-19Degree:MasterType:Thesis
Country:ChinaCandidate:H LiuFull Text:PDF
GTID:2178360242960780Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As the ever-increasing development of Communication and high performance sound and video processing technology, the design of high performance DACs applied in these fields also become research focus. However, because of the decreasing feature size of IC and supply voltage, it becomes more challenging to design high speed and high accuracy DACs.The thesis introduced a 14-bit 320MSPS DAC embedded with a high performance Bandgap Reference.The DAC is based on 0.35μm CMOS process.Firstly, In order to achieve the research and design targets, the thesis compared several kinds of different DAC constructions, and choosed the Hybrid construction as the Current-Steering DAC construction, then established the behavior level model of the DAC. Using the behavior level model, the thesis emphatically studies the influence that the output impedance of current source, mismatch error, noise and the parasitic components brings to the DAC. The research result provided important reference for the following circuit design, and made the design of the DAC became more effective.Secondly, the thesis designed and implemented a Segment Current-Steering DAC which embed a high accuracy, high stable Bandgap Reference. In the part of DAC circuit design, this thesis emphatically discussed the design and optimization of the current source unit and the driver circuits of current source switchs. In the part of the Bandgap Reference design, the thesis' emphasis is on the precision and temperature stability of the output reference voltage. Then designed and realized a two-step temperature compensation of the Bandgap Reference.Finally, the thesis discussed the layout design of the key modules and components of the DAC and the Bandgap Reference. The post-layout simulation result of the whole chip is also introduced in the end. After MPW manufacture and testing, the sampling-rate of the 14-bit DAC we designd could achieve 320MSPS, and its DNL≤±2.0LSB,INL≤±2.7LSB, SFDR=72.6dB@fdata=320MSPS, fout=25MHz. It achieved our design targets.
Keywords/Search Tags:DAC, Behavior Model, Mismatch Error, Bandgap Reference
PDF Full Text Request
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