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The Design Of8Channel Data Acquisition And Control For MIMO Radar Experiment System

Posted on:2014-12-31Degree:MasterType:Thesis
Country:ChinaCandidate:Y WuFull Text:PDF
GTID:2268330401964278Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
The unique advantage of MIMO radar has been proven by theoretical research andsimulation in many aspects, and it is of great value to promote tactical performance ofexisting radar system. For academic research of MIMO radar, my working scientificresearch team set up a bistatic radar experimental system of T/R-R mode with existingresearch achievement to achieve target detection and tracking. This system can be usedto compare and verify advantages as well as potential of different MIMO radar system.Data acquisition system can transform signal which be measured to digital signalto be saved, thereby reseachers can analyse and process this signal. Data acquisitionsystem is an important component of MIMO radar experimental system, and it is veryimportant to algorithm research in the field of radar. This paper designs and realizes a8-channel data acquisition system to acquire the echo signal of MIMO radarexperimental system with sampling rate of50Msps, sampling precision of14bit, buffermemory size of512MB as well as function of clock selection and burst mode selection.The data acquisition system which is designed in this paper is based on hardwareof the Xilinx ML605evaluation board and4DSP FMC108data acquisition card inaccordance with the working process of parameter settings and signal acquisition cycle.The control core of this system is Virtex-6series FPGA, and after caching in the DDR3memory the acquired data transmitted to the computer via Ethernet interface. The wholesystem runs under control of computer. Through Ethernet interface the computer sendcontrol commands to hardware to set acquisition parameter and start the signalacquisition and data transmission.Design of the system divided into two parts, the FPGA logic design and computersoftware. FPGA logic covers the Ethernet interface of the MAC layer, DDR3control ofreading and writing, FMC interface of data access and control. Computer softwarerealize devices connecting, hardware Settings, and data reception, working on the basisof the drivers and interface functions.In the combined test of hardware and software, each function of data acquisition isgood, each channel is synchronous, channel crosstalk is small, and the maximum sampling rate is80Msps. In the practical application of MIMO radar experiment, thesystem also achieved good anticipated effect.
Keywords/Search Tags:MIMO radar, data acquisition, FPGA, Ethernet, DDR3
PDF Full Text Request
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