The Design Of Virtual Yalid Test Platfoari Based On AFDX Net Switch Chip

With the rapid development on both designing and producing of the LSI, theexisting verification technologies which including verification tools and vali-dationmethods are becoming unable to meet the complex design requirement gradually.Thedifferent kinds of challenges faced by everyverification team include verification level,reusability, efficiency,completeness, etc. An efficientand orderly verification platformcan make great helps for verification teams, especially they can reduce the risks ofdysfunctions after the tap-out. Foreign technologies have been largely leading most ofdomestic technologies though, from the development of the whole industry, thedomestic companies or research institutions have introduced lots of advancedtechnology to makethe verification workmoveforward toa higher level.AFDX networkswitch chip, whichis a new emergingtechnologyforthe newgeneration airborne equipments inavionics system.AFDX is one of themost advancedtechnologies for datatransmission in avionicsnetwork, ithas goodqualitycharacteristics such as high bandwidth,high integration, perfect real-timeperformanceand reliability. Withtheseadvantages, itbecomes a greatpotential technology inthefield of avionics system. At thesame time, theswitch chipcan meet variouskinds ofrequirements inthe avionicsindustry, thusit has a great prospectandsignificance to beresearched anddeveloped.This article is based on the ground of AFDX network switch chip’s design andverification work to work out an usefull virtual verification platform. Afterdescriptions of the function of the switch chip’s modules and overall functionalverification requirements in the first place, we analyzed the structures of the virtualverification platform which include overall architecture, the components and therelevant relations between them. After building up the verification platform with acombination of verification specification, we cited several examples of using thisplatform to validate specification of thechip. Besides, we tested theperformance of theswitch chip with graphics anddata to demonstrate the effectsof the switch chip. So wecan have a most comprehensive analysis of the switch chip verification platform.Finally, we combined the switch chip project and verification experiences to makesome conclusions on several aspectssuch as completeness, reusability and reliabilityofthe verification platform (includingthe advantages and disadvantages). At last we had an outlook for the future verification platform technologies and pointed the role of coming technologies which have a great promotion on effectivess for virtual verification platforms.