Research And Design Of FLASH ADC With Offset Voltage Eleminating In Time Domain

With the rapid development of electronic science and technology, especiallycomputing technology and DSP (digital signal processing) widely used in the field ofautomatic control, image acquisition and processing, wireless communications, etc,processing analog signals with digital method plays a crucial role. Therefore, theanalog-to-digital conversion technology is an important direction for futuredevelopment of electronic technology. The analog-to-digital converter (ADC, Analog toDigital Converter) is required electronic device to convert analog signals to digitalsignals. Analog-to-digital converter (ADC) plays a more and more important role inmodern communication, information collection and information transmission field.First of all, we introduce the basic knowledge of the analog-to-digital converter(ADC). Combined with research projects of digital DC_DC in postgraduate, weresearch a new flash analog to digital converter (FLASH ADC). Comparator is sensitivewith DC offset voltage, and the parallel structure of the FLASH ADC will lead to hugenumber of capacitance and reduce the speed of ADC. This article proposes a digital DCoffset cancellation technique in time domain. We analysis the reasons why offsetvoltage generates and impact to FLASH ADC. We introuce a concise bubblingphenomenon eliminating circuit and complement with digital route in the design ofBDC encoder circuit.A FLASH ADC circuit is proposed in this paper based on0.13μm CMOS process.Removing DC offset voltage is the key to improve FLASH ADC performance. DCoffset voltage is transformed to phase difference and removed by digital adjustment.Simulation results show that the6bit FALSH ADC works with3MHz sampling ratewith10mv precision and4mv eleminating precision. This6bit FLASH ADC minimumLSB (LSB, Least Significant Bit) is10mv, the DNL0.62LSB, INL for0.41LSB, SNRof30.95dB and ENOB of5.1.