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Passive Uhf Rfid Tag Ic Analog Front-end Design

Posted on:2011-12-30Degree:MasterType:Thesis
Country:ChinaCandidate:S J ZhangFull Text:PDF
GTID:2198330338975938Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
In recent years, people's demand for information exchange and automation is greatly increasing with the rapid development of information technology and the significant rising living standard. Radio frequency identification technology, as the next generation of identification technology, has attracted great attention and got rapid development for its non-contact identification, small size, and large amount storage characteristics, which has show its great value in industrial production and social life. The research for UHF RFID technology has become one hot spot as the various new technology(such as chip technology, wireless communication and so on) is increasing.According to the specification of EPCTM C1G2 protocol, this paper focuses on the research and design for analog front end of the passive UHF RFID Tag IC. This paper has the following characteristics:1. The analog front end of the passive UHF RFID tag is proposed. Comparing to the traditional analog front end of the radio frequency identification tag IC, this paper improves the whole architecture and circuitry. It optimizes power consumption and provides stable clock by a self-calibration circuit and demodulator controlled under the digital condition.2. A novel rectifier circuit is proposed to improve its characteristic based on the traditional rectifier circuit. Depletion MOS or Schottky diodes, made by special semiconductor technology, are replaced by low-threshold enhance MOS in this IC. It can be compatible to the standard CMOS technology, and the cost of RFID tag chip will be reduced. It can facilitate the application of RFID tag ICs.3. According to low-power requirement of the passive UHF RFID tag ICs, the power dissipation is optimized in this paper. The power dissipation of this design is to 2.2μW. Compared to some RFID implementation, power dissipation is lower. In this paper, the low-voltage and low-power analog front end of passive UHF RFID tag IC has been designed by SMIC 0.18μm EEPROM technology. The power dissipation of the whole circuits is about 2.2μW and the supply voltage is 1.0V. This analog front end of passive UHF RFID tag IC meets the low-power and low-voltage requirements.
Keywords/Search Tags:Radio Frequency Identification (RFID), Tag IC, Low voltage, Low power
PDF Full Text Request
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