The Design And Implementation Of PCI Port For YHFT-DSPX

YHFT-DSPX is a high-performance32-bit fix-point microprocessor chip that is designedby National University of Defense Technology independently. It has a wide range ofapplications in wireless base stations, ADSL, radar, image, multimedia information processingand other high-performance digital signal processing.This article designed and implemented a32-bit PCI interface for YHFT-DSPX so as to enhance the data transmission between the DSPand the external host and also between the DSP and peripheral control unit, which provide aquick channel for data communication between DSP and external host.This article analyzed the characteristics of the PCI interface in depth. According to therequirements of YHFT-DSPX, we have compeled the work of the system design, verificationand FPGA emulation. The PCI interface, the address and data of which is32bits, followsPCI2.2protocol and meets the requirement of PC99specification. The working frequency ofthe PCI interface is33MHz, and the highest transmission bandwidth is up to132MB/s. ThisPCI interface supports these followed commands, including memory read, memory read line,memory read lines, memory write, IO read/write and configuration read/write. In PCItransaction, not only the interface can be used as the master device initiate bus transaction butalso as a slave accept bus transaction. PCI interface has automatic initialization function.It connects with external EEPROM, and after power-on reset, the EEPROM controller will loadinformation that stored in the ROM for auto-initialization of PCI configuration registers. In thePCI interface, the DMA is used to transmit with DSP, and there are many paralleled FIFO toensure high speed data transmission of PCI interface. Besides, there are special registerchannels linked with DSP, which make convenience to carry out intercommunion between DSPand PCI interface with status messages and control commands.At last, we do the synthesis under the65nm technology library whose highest frequency ofthe main clock can up to555MHz, in this case, the PCI interface still works normally.According to the requirements, that the frequency of PCI interface not less than400MHz, andthe result of synthesis is that the area should be61781um~2and the power should be3.1696mW.It meets the requirement of the design.