APB Bus-based Interface IP Design And Verification

Presented in the 90s of 20th century, SoC technology has become the mainstream IC design technology, which greatly promotes the development of IC design. On-chip bus and IP technology lead to the further development of SoC. ARM's AMBA bus which has a number of IC vendors to support, is one of the mainstream on-chip bus standards. SPI bus protocol and I~2C bus protocol are simple, synchronous, serial communication protocols and widely used to connect low-speed peripherals. To design AMBA bus-based SPI interface and I~2C interface IP cores which possess proprietary intellectual property is of great significance.This paper introduces the classification of IP cores and their respective advantages and disadvantages, then describes the IP core design methods and design process. The characteristics of AMBA, SPI and I~2C protocol are discussed, including signals, read and write timing sequence and functional structures and so on. On this basis, APB Bus based SPI interface and I~2C interface IP cores are designed. Firstly, this paper plans overall function and the design specifications of the two modules. Then implements the two IP cores using Verilog HDL. After that, detailed verification program is planned. Build simulation platforms, then design input stimulus covering all functions of the design, then run simulation in Modelsim. Simulation results show that the two IP cores perform protocol functions correctly and satisfy the design requirements. Finally, through synthesizing the two IP cores based on SMIC 0.13μm technology, the estimated area of two IP cores are 569615.56μm2 and 208994.00μm2 respectively.