Study And Design Of VLSI Architecture Of A Non-2-based FFT Algorithm

Fast Fourier transform is the Fast algorithm of discrete Fourier transform, it makesthe the discrete Fourier transform algorithm better to use. It is a big help for usingdiscrete Fourier transform in computer system or digital system application, which canbe said to be a big step.This topic is from: guangdong international cooperation project " the research anddevelopment of computer hardware and software system of three-dimensionalcone-beam imaging in medical CT machine ".The mainly research content of this paper includes the following three parts:Firstof all, this paper introduces the current most commonly used several non-2-based fastFourier transform algorithm, and makes research and analysis.Secondly, present a kindof not-base2FFT algorithm which is suitable for the paper, and achieve the algorithmby C language, and the function of the proposed algorithm is testified.Finally, design thecircuit structure an achieve it by using Verilog language, and then do several speedoptimizations. After that do the function simulation of the circuit and the realization ofthe hardware circuit on FPGA. The algorithm of paper can fit the arbitrary point DFTand is better for application capared with some other algorithm.The design of non-2-based FFT VLSI structure in this paper has the followingfeatures: It can be used in the DFT of which the input sequence points N is a arbitraryvalue. By changing the value of N, N1and N2the circuit can caculate the different DFT.Enhance the performance of the structure in this paper by the means of three kinds ofparallel computing including the real part, imaginary part parallel computing, theiterative and output calculation parallel computing, part of floating point numbermultiplication parallel computing. Economize the resource by reusing the module ofGoertzel calculating.In this paper, achieving the hardware circuit by the ISE and Xilinx Virtex-5FPGA,and the output for the result tset is right.Reading the synthesize report we can know thatthe LUT slice utilization rate is about70%, register slice utilization rate of all is about30%.The highest working frequency up to110MHz. Considering the designed structurecan be applied to the arbitrary point DFT and it has a relative better speed performance,so the structure can be applied to system of communication for a kind of functionexpansion. The strcture has good application future.