Research And Hardware Implementation Of Zero-If Receiver

In recent years, Software defined radio draws more and more attention with modern wireless communication system’s development in the direction of the multimode and multi-band. Software defined radio’s basic idea is to build a common hardware platform. And in the hardware platform,the analog-to-digital converter should be as close as possible to the antenna,so that the signal can be processed in digital domain as early as possible. RF front-end is a very critical part in software defined radio system. Its quality directly determines the degree of difficulty in processing the next signal.The RF front-end of the receiver is designed and realised based on the architecture of zero-IF. According to the functions of the various parts of the receiver, the RF front-end of zero-IF receiver is divided into five modules.They are low noise amplifier module, gain control module, mixer module, the local oscillator module, baseband filter and amplifier module. The function of each module is realised using a chip. The link budget of the receiver is done based on the gain, noise figure, linearity characteristics and power consumption of the core chip in each module. In paper, the bias circuit and stability of the low noise amplifier module are simulated by ADS(Advanced Design system) software. The simulation results show that the amplifier can work on the quiescent operating point of a preseted3.3V,40mA. And at the same time the amplifier is absolutely stable. The input and output matching circuit of the low noise amplifier module are also designed. The input circuit is mached based on the best noise,and the output circuit is mathed based the best power. Then the key points in the schematic of RF front-end are descirbed. These key points are the selection and placement of the capacitor and choke inductor near the power pin of chip, the design and simulation of the loop filter in the local oscillator module, the selection of reference source in PLL(Phase-locked loop). FPGA(Field Programmable Gate Array) is used to control the gain of the receiver, the output frequency of the local oscillator and the bandwith of the basedband filter via SPI(Serial Peripheral Interface) interface.The prototype of the receiver is designed using four-layer print circuit board(PCB). To get50ohm impedance for RF signal’s trace in the top and bottom layers of the PCB. Roger materials are used as PCB’s medium, whose dielectric constant is greatly stable. The width of the line is calculated according to the thickness of the medium, the thickness of the copper foil, and the value of the dielectric constant. In the process of PCB implementation, the dividing of digital and analog ground, the spliting of power plane and the layout of the RF devices are highlights. Welded and debugged, power stability of the receiver, SPI interface’s output waveform and the power and noise of local oscillator module’s output frequency is tested. The result of test shows that the receiver has realized the basic functions. But indicators are bad,and optimization needs to be done in the further.