Research Of Key Techniques And Implementation On CMOS RF Receiving Integrated Circuits

The naissance and development of RF wireless communication technique bring about highly developed informationization for the society. As the based device, RFIC is the research hotspot all the while at this domain. This paper focus on CMOS RFIC, deeply analyses the key techniques under designing the RFIC, and raises optimum resolvent, based on four aspects: the requirements on communication, architecture, frequency and link budget. The key techniques of this paper can be generalized as follows:1) Taking the parastical effect into account, the design methods and processes about wideband matching are summarized in detail, and simultaneous power and noise matching for narrowband receiver also presented; 2) Automatic LC calibration is integrated to obtain constant resonant frequency against PVT variations, and a Q-factor-enhance function of LC load is also achieved to improve the out-of-band linearity of the RF fornt-end; 3) The filter bandwidth calibration circuit based on search and compare is proposed to the wideband communication with multiple bandwidth frequencies, which can increase the free degree to calibrate the filter bandwidth, and significantly decreases the design complexity and chip area; 4) Digitally-assisted static DC offset calibration and digital dynamic DC offset calibration are both used to calibrate the DC offset in the zero-IF RF receiver, which can effectively calibrate the DC offset introduced by the receiverself and outside interferences; 5) Adaptive I/Q mismatch calibration arithmetic based on constant noise power spectrum density is proposed to improve the image rejection ratio in the low-IF RF receiver; 6) To the wideband frequency synthesizer, a general design method is presented to guarantee the stability of loop and loop bandwidth, and a novel design method based on error compensation is proposed to shorten the locking time of the frequency synthesizer; 7) A receiver link budget scheme based on SFDR is presented to exactly compute and distribute the noise factor and linearity to the every circuit block.A wide-band zero-IF DVB-S/S2 & ABS-S RF receiver and two narrow-band low-IF multimode GNSS RF receivers are utilized to validate the key techniques stated above. Moreover, the contents describing every receiver contain system design, circuit block design and final test results to provide references for other receiver designs.