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The Research And Design Of The Key Circuits In The Pipeline ADCs Based Touch-screen Controller

Posted on:2014-02-08Degree:MasterType:Thesis
Country:ChinaCandidate:Y ChenFull Text:PDF
GTID:2248330398964775Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In portable electronic products, due to its advantages of convenience, occupying lessspace and flexibility, touch-screen has gradually replaced keyboard, and become the inputdevices of embedded computer systems. Portable or battery-powered electronic devicesrequire low voltage and low power consumption. Analog-to-digital converter(ADC) is thecore of the touch screen controller, so the design of high performance ADC appears to bethe hot spot. To accommodate the different wireless communication standards, the ADCsshould be reconfigurable with resolution and speed, which can achieve the optimizedpower in the each mode. The pipeline ADCs referred in the thesis is easy to realizereconfigurable design for the its good trade-off between resolution, area, speed and power.This thesis presents the key circuits which are used in a12bit,10MSPS, low-voltage,low-power pipeline ADC which is designed in the0.18um CMOS technology. The maincontent of the works includes:1. Introduction to various ADC architectures, the principle and structure of pipelineADCs, sampling theory and some performance metrics.2. The non-ideality errors in the pipeline ADCs are investigated to identify thespecifications requirement of the circuits. The behavioral model of the ADCs isbuilt by the Simulink of Matlab. The indexes of the MDAC, such as gain, GBWand SR, are identified.3. The analysis and simulation of main blocks in a12bit20MSPS pipelined ADCbased on the0.18um CMOS technology will be presented. The simulation resultshave achieved the precision and verified the design.4. Layout design basic principles and Monte Carlo simulation are introduced.Under the conditions of1.8-V supply voltage,27°C and TT process, the simulationresults show that the average current is3.98mA and power consumption is7.17mW.
Keywords/Search Tags:Pipleline ADC, System level model, MDAC, Operational Amplifier, Low power consumption
PDF Full Text Request
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