Research And Design Of A2.4GHz Orthogonal Frequency Synthesizer Based On RFCMOS Technology

With the rapid development of large scale integrated circuit technology, therealization of monolithic integrated wireless transceiver RF front-end has becomepossible. These monolithic integrated wireless transceiver RF front-end use low IF orzero IF architecture, inhibit image interference by orthogonal mixing. As an importantmodule of low IF and zero IF wireless transceiver RF front-end, the orthogonalfrequency synthesizer provides a stable, orthogonal and programmable local oscillatorsignals to wireless transceiver, and its performance determines the system performanceof wireless transceivers to a large extent. Therefore, to design a orthogonal frequencysynthesizer which is characterized by fast lock, low phase noise and glitches, the fourorthogonal output signal match, is critical for high performance wireless transceiversystems.The objective of this thesis is to design a frequency synthesizer based on TSMC0.18μm RFCMOS process, which can provide four orthogonal local oscillator signals,and is used in2.4GHz band wireless communication systems. The thesis describes thedesign of frequency synthesizer from the basic theory, circuit level, system level andlayout four aspects. First, this thesis introduces the orthogonal frequency synthesizerapplications, lists several methods to generate orthogonal local oscillator signal, andultimately selects the method by using divider. A linear model of frequency synthesizeris established. Then based on this linear model, the noise of frequency synthesizer isanalyzed, which provide a theoretical guidance to the implementation of low phasenoise frequency synthesizer. After the theory is analyzed and the various non-ideafactors of each module of orthogonal frequency synthesizer is considered, the designand simulation of4.9GHz LC VCO, charge pump, PFD, high frequency divider and16/17dual-modulus prescaler are finished under the Cadence environment. The designmethods of second-order loop filter and third-order loop filter are summarized based onthe previous theory, and a loop filter calculation software is designed using MATLAB.a set of methods for frequency synthesizer system simulation and optimization isproposed, and frequency synthesizer system simulation model is established under ADS,which greatly reduce the time consuming of system simulation of frequency synthesizer.Layout optimization methods for digital analog hybrid circuits are summarized, and onthis basis, the layouts of the orthogonal frequency synthesizer are realized usingVirtuoso. Final system simulation results show that lock time of orthogonal frequency synthesizer is about59μs when output frequency change10MHz, the phase noiseperformance at output frequency2.45GHz is:-87.2dBc@10kHz,-94.4dBc@100kHz,-121.8dBc@1MHz,-136.6dBc@5MHz, which achieves the expected performancerequirements.