Research And Design Of Multi-Modulus Prescaler In RF Frequncy Synthesizer

The operating frequency of RF Frequency Synthesizer has expanded to Multi-GHz with the global explosive increment in wireless communication market. As a key building-block in RF front-end circuit, Frequency Synthesizer should also fulfill channel switching requirement in communication system. Therefore, the multi-modulus prescaler become the bottleneck in PLL's speed-power optimizing due to the design difficulties.Phase-switching Technique is widely used in modern prescaler design. However, existing method can provide only 2 continuous division ratio, with timing im-convergence and circuit instability drawbacks. In this thesis, existing phase-switching method is analyzed in detail, and a novel phase-switching topology is proposed. The proposed topology employs imbalanced phase-switching technique to increase switching window. Furthermore, a differential divide-by-2 unit is added after the high-speed MUX to generate a 90 delayed clock which drives followed control logic circuit, makes the switching in correct switching window, to achieve timing convergence. The differential divide-by-2 unit is also beneficial to solve possible problems due to insufficient voltage swing. Finally, modified control logic provides 3 continuous division ratios. To verify the validity of the proposed topology, a 15/16/17 triple-modulus prescaler is build in SMIC 0.18um RF CMOS process, which consists of varieties of modules. CML and TSPC logic are used and the power and speed of each module is carefully optimized. Simulation shows the prescaler demonstrates a maximum frequency of 8.0GHz, with no more than 6mW power consumption, which are better than existing design.