Design Of Channel Estimator And Equalizer In DTMB-OFDM System And VLSI Imaplementtion

In recent years, with the formulation and promotion of Chinese DigitalTelevision Terrestrial Broadcasting (DTMB) transmission standard, more and morecompanies are engaged in the development and application of DTMB products.This dissertation focuses on the design and hardware implementation of channelestimator and equalizer in DTMB-OFDM system. Firstly, the developing status ofDigital Television Terrestrial Broadcasting transmission technique both at homeand abroad is introduced. Then, DTMB transmission standard, which is followedby the structure introduction of the transmitter and the basic principle ofDTMB-OFDM receiver, is introduced. After that, an iterative channel estimationalgorithm based on PN sequence reconstruction is proposed in the design ofDTMB transmission chip. First, we utilize a rough channel impulse response toreconstruct the received frame body and the adjacent PN sequences to get a moreaccurate channel impulse response. Then, utilize the new channel impulse responseto repeat the same procedure again and again. In addition, a systematic study onVLSI design method of the algorithm is done in the thesis. Design modules includethe following parts: frame data buffer, PN sequence generation, initializationdesign, iterative calculation design, etc. At the same time, EDA simulation resultsof the main modules are presented in this thesis. In frame data buffer design, utilizethe characteristic of ping-pang buffer to provide sufficient time sequence forimplementing the whole function of iterative algorithm. Furthermore, utilize theparallel transmission method to shorten the period which is used to process oneframe in system. Additionally, utilize the measure of module multiplexing, toreduce the order of complexity for algorithm implementation, and optimize thecircuit area and power consumption, which established a balanceable relationshipbetween algorithm and hardware resources.